vhdl
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| Both sides previous revisionPrevious revisionNext revision | Previous revision | ||
| vhdl [2025/10/29 20:01] – 147.32.8.31 | vhdl [2025/10/29 20:27] (current) – [SDRAM Memory] 147.32.8.31 | ||
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| Line 243: | Line 243: | ||
| ); | ); | ||
| end entity; | end entity; | ||
| - | |||
| - | ===== DDR Memory ===== | ||
| architecture Behavioral of sdram_controller is | architecture Behavioral of sdram_controller is | ||
| Line 846: | Line 844: | ||
| unsigned char *signal_value = (unsigned char *) args; | unsigned char *signal_value = (unsigned char *) args; | ||
| - | printf(" | + | printf(" | 
| - | ", *signal_value); | + | |
| // Modify the signal (e.g., increment) | // Modify the signal (e.g., increment) | ||
| *signal_value = (*signal_value + 1) & 0xFF; | *signal_value = (*signal_value + 1) & 0xFF; | ||
| - | printf(" | + | printf(" | 
| - | ", *signal_value); | + | |
| } | } | ||
| </ | </ | ||
| Line 863: | Line 859: | ||
| ghdl -r testbench --stop-time=50ns | ghdl -r testbench --stop-time=50ns | ||
| </ | </ | ||
| + | |||
| + | https:// | ||
vhdl.1761768082.txt.gz · Last modified: 2025/10/29 20:01 by 147.32.8.31
                
                